cystech electronics corp. spec. no. : c789q8 issued date : 2011.12.16 revised date : page no. : 1/9 MTB04N03Q8 cystek product specification n-channel logic level enhancement mode power mosfet MTB04N03Q8 bv dss 30v i d 25a r dson @v gs =10v, i d =18a 3.5m (typ) r dson @v gs =4.5v, i d =12a 4.8m (typ) description the MTB04N03Q8 is a n-channel enhancement-mode mosfet, providing the designer with the best combination of fast switching, ruggedized device de sign, low on-resistance and cost effectiveness. the sop-8 package is universally preferred for all commercial-industrial surface mount applications and suited for low voltage applicati ons such as dc/dc converters. features ? single drive requirement ? low on-resistance ? fast switching characteristic ? dynamic dv/dt rating ? repetitive avalanche rated ? pb-free lead plating package symbol outline MTB04N03Q8 sop-8 pin 1 g gate d drain s source
cystech electronics corp. spec. no. : c789q8 issued date : 2011.12.16 revised date : page no. : 2/9 MTB04N03Q8 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds 30 gate-source voltage v gs 20 v continuous drain current @ t c =25 c 25 continuous drain current @ t c =100c i d 16 pulsed drain current i dm 100 *1 avalanche current i as 20 a avalanche energy @ l=0.1mh, i d =20a, v dd =15v e as 40 repetitive avalanche energy @ l=0.05mh e ar 0.3 *2 mj t a =25 2.5 total power dissipation t a =100 p d 1 w operating junction and storage temp erature range tj, tstg -55~+150 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 25 c/w thermal resistance, junction-to-ambient, max r th,j-a 50 *3 c/w note : 1. pulse width limited by maximum junction temperature 2. duty cycle 1% 3. surface mounted on 1 in2 copper pad of fr-4 board, 125 c/w when mounted on minimum copper pad characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 30 - - v v gs =0, i d =250 a v gs(th) 1.0 1.6 2.5 v v ds = v gs , i d =250 a g fs *1 - 32 - s v ds =5v, i d =18a i gss - - 100 na v gs = 20 - - 1 v ds =30v, v gs =0 i dss - - 25 a v ds =30v, v gs =0, tj=125 c - 3.5 4 m v gs =10v, i d =18a r ds(on) *1 - 4.8 6 m v gs =4.5v, i d =12a dynamic ciss - 4200 - coss - 405 - crss - 400 - pf v gs =0v, v ds =15v, f=1mhz
cystech electronics corp. spec. no. : c789q8 issued date : 2011.12.16 revised date : page no. : 3/9 MTB04N03Q8 cystek product specification characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions qg (v gs =10v) *1, 2 - 50 - qg (v gs =4.5v) *1, 2 - 30 - qgs *1, 2 - 8 - qgd *1, 2 - 17 - nc v ds =15v, v gs =10v, i d =18a t d(on) *1, 2 - 18 - tr *1, 2 - 11 - t d(off) *1, 2 - 65 - t f *1, 2 - 15 - ns v ds =15v, i d =1a, v gs =10v, r gs =2.7 rg - 1.6 - v gs =15mv, v ds =0v, f=1mhz source-drain diode i s *1 - - 10 i sm *3 - - 40 a v sd *1 - - 1.2 v i f =i s , v gs =0v trr - 35 - ns qrr - 14 - nc i f =i s , di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. ordering information device package shipping marking MTB04N03Q8 sop-8 (pb-free lead plating package) 2500 pcs / tape & reel b04n03
cystech electronics corp. spec. no. : c789q8 issued date : 2011.12.16 revised date : page no. : 4/9 MTB04N03Q8 cystek product specification typical characteristics typical output characteristics 0 40 80 120 160 200 240 0246810 v ds , drain-source voltage(v) i d , drain current(a) 7v,8v,9v,10v v gs =3v v gs =4v v gs =5v 6v v gs = 2v brekdown voltage vs ambient temperature 20 25 30 35 40 45 50 -100 -50 0 50 100 150 200 tj, junction temperature(c) bv dss , drain-source breakdown voltage(v) i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 1 10 100 1000 0.001 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =10v v gs =2.5v v gs = 3v v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 024681 i dr , reverse drain current(a) v sd , source-drain voltage(v) 0 tj=25c tj=150c static drain-source on-state resistance vs gate-source voltage 0 10 20 30 40 50 60 70 80 90 100 024681 0 drain-source on-state resistance vs junction tempearture 0 2 4 6 8 10 12 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) r ds(on) , static drain-source on-state resistance(m) v gs =10v, i d =18a v gs =4.5v, i d =12a v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =18a
cystech electronics corp. spec. no. : c789q8 issued date : 2011.12.16 revised date : page no. : 5/9 MTB04N03Q8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 100 1000 10000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.8 1 1.2 1.4 1.6 1.8 2 -60 -20 20 60 100 140 tj, junction temperature(c) v gs(th) , threshold voltage(v) i d =250 a forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 i d , drain current(a) g fs , forward transfer admittance(s) v ds =10v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 0 102030405060 qg, total gate charge(nc) v gs , gate-source voltage(v) v ds =15v i d =18a maximum safe operating area 0.01 0.1 1 10 100 1000 0.01 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) dc 10ms 100m 1ms 100 s 10 s r ds( on) limit t a =25c, tj=150c single pulse maximum drain current vs case temperature 0 5 10 15 20 25 30 25 50 75 100 125 150 175 t c , case temperature(c) i d , maximum drain current(a)
cystech electronics corp. spec. no. : c789q8 issued date : 2011.12.16 revised date : page no. : 6/9 MTB04N03Q8 cystek product specification typical characteristics(cont.) transient thermal response curves 0.1 1 10 100 1.e-05 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 t 1 , square wave pulse duration(s) z ja (t), thermal response single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.z ja (t)=50 c/w max. 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *z ja (t)
cystech electronics corp. spec. no. : c789q8 issued date : 2011.12.16 revised date : page no. : 7/9 MTB04N03Q8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c789q8 issued date : 2011.12.16 revised date : page no. : 8/9 MTB04N03Q8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) 100 c 150 c ? time(ts min to ts max ) 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c789q8 issued date : 2011.12.16 revised date : page no. : 9/9 MTB04N03Q8 cystek product specification sop-8 dimension millimeters inches millimeters marking: 8-lead sop-8 plastic package cystek packa g e code: q8 date code device name inches dim min. max. min. max. dim min. max. min. max. a 1.350 1.750 0.053 0.069 e 3.800 4.000 0.150 0.157 a1 0.100 0.250 0.004 0.010 e1 5.800 6.200 0.228 0.244 a2 1.350 1.550 0.053 0.061 e 1.270 (bsc) 0.050 (bsc) b 0.330 0.510 0.013 0.020 l 0.400 1.270 0.016 0.050 8 c 0.170 0.250 0.006 0.010 0 0 8 d 4.700 5.100 0.185 0.200 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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